//this is a testbench for the chip which supports SHA256 and SM3
//Last modified by yangjao at 2021/5/10

`timescale 1ns/1ps

module SHA256_SM3_tb();

reg clk, rst_n, EN, select, new;
reg[7:0] data_in;
wire[7:0] data_out;
wire in_valid, out_valid;

SHA256_SM3_TOP SHA256_SM3(
    .clk(clk),
    .rst_n(rst_n),
    .EN(EN),
    .data_in(data_in),
    .select(select),
    .new(new),
    .in_valid(in_valid),

    .out_valid(out_valid),
    .data_out(data_out)
);

endmodule